Principal Engineer, Packaging Engineering

Job Description
ESSENTIAL DUTIES AND RESPONSIBILITIES
As a Packaging Engineer, you will work in the Packaging R&
D group on the modeling and simulation, design of experiment and testing across semiconductor packaging, flash memory product and host levels.
Responsible for influencing package and product design by addressing the structural integrity and reliability issues in particular and advancing the technology of semiconductor packaging in general. The scope is to address all mechanical aspects of packaging technology and associated material and process interactions. The focus will be on solutions to meet increased demands for small form factor packages with thinner chips, denser interconnects, higher power, and higher reliability (under harsh use conditions).
Responsible for the modeling and simulation, design of experiment, and testing, whichever comes first for best engineering practice, of mechanical responses of IC package and flash products including solid state drives.
This position will interface with package &
product design, electrical and physical characterization, reliability testing, failure analysis, assembly R&
D and other process teams.
Solid background in applied mechanics, especially computational and/or experimental solid mechanics, is required. In-depth knowledge of IC packaging is highly desired.